Slide 1Slide 4 Slide 5 Slide 2 Slide 3

Design and Implementation of Multiple-Input Multiple-Output Systems - From MIMO to massive MIMO

Prof. Yuan-Hao Huang (National Tsing Hua University, Taiwan)

Ballroom Maesato(1), 14:30-17:30, 17 November 2014

Spatial-multiplexing multiple-input multiple-output (MIMO) system has become a major technique to increase the information capacity of modern communication systems. For the design and implementation of MIMO systems, many researchers in the literature have designed 4x4 MIMO detector chips with up to several Gbps throughput by improving the algorithm, architecture, or IC process. However, as the number of antenna arrays further increases (8x8, or massive MIMO), MIMO detector designers must face many challenging issues, such as cubic growth of decoding complexity O(N^3), huge power consumption of RF chains, MIMO channel correlation, antenna interference, etc.

This talk will first present the fundamentals of the design of MIMO detectors including linear and nonlinear MIMO detection algorithms and their architectures. To investigate the design issues for massive MIMO detector, the second part of the talk will further present an 8x8 MIMO detector based on lattice reduction preprocessing technique. The lattice reduction technique searches for a unimodular matrix T that transforms the MIMO channel to a more orthogonal channel matrix so that the channel interference between antennas can be greatly reduced, especially for a correlation MIMO channel. The third part of the talk will introduce several new techniques that have recently been proposed for massive MIMO systems. The systematic research usually defines massive MIMO as a MIMO system with up to hundreds of antenna. The large number of antennas leads to several critical several design issues for MIMO detectors, including employment of the large-sized antenna arrays, huge power consumption of RF chains, and the high-complexity MIMO detection in the baseband processing. This part will introduce several techniques that tries to address these design issues, such as spatially-modulated multiple-input multiple-output (SM-MIMO), hybrid RF/baseband MIMO precoding (beamforming), and 2D antenna arrays. This part will also summarize several potential research problems for the design and implementation of future massive MIMO systems. Finally, a conclusion will be given.

Prof. Thanos Stouraitis Prof. Yuan-Hao Huang was born in Taiwan in 1973. He received the B.S. and Ph.D. degrees in electrical engineering from National Taiwan University, Taipei, Taiwan, R.O.C., in 1995 and 2001, respectively. He was a Member of Technical Staff with VXIS Technology Corporation, Taiwan from 2001 and 2005. Since 2005, He has been with the Department of Electrical Engineering and the Institute of Communications Engineering, National Tsing-Hua University, Taiwan, where he is currently an Associate Professor.

His research interests include VLSI design for digital signal processing systems and telecommunication systems. He is currently a member of Design and Implementation of Signal Processing Systems (DiSPS) technical committee of IEEE Signal Processing Society, and also a member of VLSI Systems and Applications (VSA) technical committee of IEEE Circuits and Systems Society.

WBAN Standard and its Energy Consumption Issues

Speaker: Prof. Kyung Sup Kwak (Inha University, Korea)

Ballroom Maesato(2), 14:30-17:30, 17 November 2014

IEEE802.15.6 developed standard for WBAN(Wireless Body Area Network), which covers applications of medical and non-medical uses. WBAN is a hybrid of sensor network technology and biomedical engineering. WBAN technology has many potential uses: Medical sensor networks, sport and fitness monitoring, wireless audio, mobile devises, and personal video devices, etc. Each has unique requirements in terms of bandwidth, power usage, delay, and service coverage. For medical applications, energy efficiency is one of the vital issues that have to be taken care of in terms of BAN performance.

IEEE802.15.6 standard defines Medium Access Control(MAC) layer supporting three PHY layers; Narrowband (NB), Ultra Wideband (UWB), and Human Body communications (HBC) layers. Each PHY layer defines four channel models: implant to implant(CM1), implant to body surface(CM2), body surface to body surface(CM3) and body surface to external node(CM4). The MAC layer is to provide error free data transfer to the network layer as well to support efficient power consumption, throughput and quality of service (QoS) of physical channel.

In this talk, we covers the specifications of detailed of PHY and MAC standard and then investigate the energy consumption issues in contention access protocols and communication channel models. We first consider the system, signal and channel model. We then provide analytic expressions for bit error rate for impulse radio UWB using BPSK modulation and then find the effective energy consumption per bit for a given bit error rate in the given channel models.

Prof. Thanos Stouraitis Kyung S. Kwak received the B.S. degree from the Inha University, Incheon, Korea in 1977, and the M.S. degree from the University of Southern California in 1981 and the Ph.D. degree from the University of California at San Diego in 1988, under the Inha University Fellowship and the Korea Electric Association Abroad Scholarship Grants, respectively.

From 1988 to 1989 he was with Hughes Network Systems, San Diego, California. From 1989 to 1990 he was with the IBM Network Analysis Center at Research Triangle Park, North Carolina. Since then he has been with the School of Information and Communication Engineering, Inha University, Korea as a professor. He had been the chairman of the School of Electrical and Computer Engineering from 1999 to 2000 and the dean of the Graduate School of Information Technology and Telecommunications from 2001 to 2002 at the Inha University, Incheon, Korea. He has been the directors of UWB Wireless Communications Research Center, a formerly key national IT research center, Korea since 2003. In 2006, he served as the president of Korean Institute of Communication Sciences (KICS), and in 2009, the president of Korea Institute of Intelligent Transport Systems (KITS). In 1993, he received Engineering College Achievement Award from Inha University, and a service award from the Institute of Electronics Engineers of Korea (IEEK), in 1996 and 1999 he received distinguished service awards from the KICS. He received the LG Paper Award in 1998, and Motorola Paper Award in 2000. He received Awards of research achievements on UWB radio technology research and development from Minister of Information & Communication, Prime Minister, and President of Korea in 2005 and 2006, respectively. Also, in 2007, Haedong Paper Award and in 2009, Haedong Prize of research achievement. In 2008, he was elected for Inha Fellow Professor (IFP).

His research interests include multiple access communication systems, UWB radio systems and sensor networks. Mr. Kwak is members of IEEE, IEICE, KICS, KITS and IEEK.

3D Integration - From Silicon to Heterogeneous Technologies

Speaker: Prof. Maciej Ogorzalek (Jagiellonian University)

Ballroom Maesato(3), 14:30-17:30, 17 November 2014

A continuous trend of increased integration of system components on a single die creates numerous design challenges. Energy efficiency is the most significant one, and 3D integration is one of the best hopes enabling true integration of hybrid systems on chip. Three-dimensional integrated circuits (3D ICs) consist of multiple layers of microcircuits interconnected vertically. This is in contrast to traditional ICs where functional parts are arranged in one layer. Two main types of 3D integration technologies can be identified. In parallel 3D systems, prefabricated multiple dies are stacked vertically and interconnected with Through-Silicon Vias (TSVs) or some other technique. Sequential or monolithic 3D integration consists of circuits fabricated layer by layer on the same wafer.

3D stacking opens tremendous opportunity for integration of micro/nano/bio systems into one package, as well as allowing for efficient integration of digital, analog, RF, and sensor systems. This tutorial presents an overview of technologies currently being developed for 3D stacking of silicon and hybrid systems developed in heterogeneous technologies. This requires modification of design methodologies and development of new evaluation and optimization techniques. We discuss advantages and challenges of current 3D TSV-based vertical integration technologies, TSV modeling, the 3D system architecture, energy/connection efficiency and optimization. We present an overview of new concepts for construction of heterogeneous layers on chip containing such devices as energy scavengers and energy storing devices including hyper-capacitors and micro-batteries. There exists a variety of devices converting light, mechanical, thermal or bio energy into electric energy which might be used as power supplies for systems-on-chip. Current achievements in these classes of systems and the possibilities of their integration will be discussed. Heterogeneous layers could be build using new materials such as graphen, carbon nano-tubes, silicon nanowires. The integration possibilities of heterogeneous layers on a single chip will be discussed in detail.

Prof. Maciej Ogorzalek Maciej J. Ogorzalek is Professor of Electrical Engineering and Computer Science and Head of the Department of Information Technologies, Jagiellonian University Krakow, Poland.

He held many visiting positions in Denmark, Switzerland, Germany, Spain, Japan, Hong Kong. He received a Research Award from the Ministry of Education of Spain in 2000 and worked for one year as Guest Professor at the National Microelectronic Center, Sevilla, Spain. In 2001 he received a Senior Scientists Award from the Japan Society for Promotion of Science as visiting professor at Kyoto University and in 2005 Hertie Foundation Fellowship at The Goethe Universty Frankfurt-am-Main, Germany. 2006-2009 he held the Chair of Biosignals and Systems, Hong Kong Polytechnic University under the Distinguished Scholars Scheme.

Author or co-author of over 280 technical papers published in journals and conference proceedings, author of the book Chaos and Complexity in Nonlinear Electronic Circuits (World Scientific, 1997). In the last five years he gave over 45 invited plenary and keynote lectures to international conferences world-wide.

His research interests are in the domains of new computational methods for design of next generation integrated circuits and systems, heterogeneous 3D systems-on-chip, nonlinear circuits and systems, applications of nonlinear methods and fractals in electronics and information engineering, bio-medical signal processing, computational systems biology.

He was co-organizer (with G. DeMicheli and S. Mitra) of the CAS FEST event "Heterogeneous Nano-circuits and Systems", Seoul, Korea together with the special issue of the Journal of Selected and Emerging Topics in Circuits and Systems dedicated to this area of research. He served also as co-editor of several special issues of IEEE Proceedings (last on Computational System Biology in 2008)

He served as Editor-in-Chief of the Circuits and Systems Magazine 2004-2007, Associate Editor for the IEEE Transactions on Circuits and Systems Part I, 1993-1995 and 1999-2001 and Associate Editor of Proceedings of the IEEE 2004-2009. He serves also as an Associate Editor - Journal of the Franklin Institute (1997-), Associate Editor of International Journal of Bifurcation and Chaos, Secretary of the Editorial Board for the Quarterly of Electrical Engineering (1993-2000), Member of the Editorial Board of Automatics (both in Polish), and Member of the Editorial board of the International Journal of Circuit Theory and Applications (2000- ). Since 2009 he is an Associate Editor of the NOLTA Journal (Japan). He is IEEE Fellow (1997) and has been CASS Distinguished Lecturer (2004-2005). He served IEEE CAS Society in various capacities including 2008 Society President. He was Cheirmen of IEEE Poland Section (2010-2013), Chairman of the IEEE Prize Paper and Scholarships Committee (2012-2013). Currently he is Member of the IEEE Fellow Evaluation Committee and Vice-chair of the IEEE Recognitions Council. Recipient of the IEEE-CAS Golden Jubilee Award and the CASS Guillemin-Cauer (best paper) Award 2002 and CAS Society Meritorious Service Award 2012. In 2012 he has been elected member of the European Academy of Sciences.